Multiple IRQ pins

Discussion around products based on ARM Cortex-A5 core.

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igortf
Posts: 18
Joined: Tue Mar 27, 2018 8:27 pm

Multiple IRQ pins

Thu Feb 28, 2019 10:02 pm

Hello,

I am using a custom board with SAMA5D27C-D5M with the linux4sam (4.9.98 with real time). I have two pins (PA12 and PA21) configured as IRQ. I configured the external interruption of the AIC (ID 49) to use the IRQ interruption. However, when both pins are IRQ, juts the pin PA21 interrupts, the pin PA12 never interrupts. I read the datasheet, search in google and I found nothing about any restriction of two pins with the same function. I tried to change the PA21 function back to GPIO and the pin PA12 starts to interrupt. Is there something I can do to use the both pins as IRQ and call my interruption? Or the AIC is not able to recognize two IRQ sources?

Thanks in advance,
Igor Franco
blue_z
Location: USA
Posts: 1977
Joined: Thu Apr 19, 2007 10:15 pm

Re: Multiple IRQ pins

Fri Mar 01, 2019 4:44 am

igortf wrote: Is there something I can do to use the both pins as IRQ and call my interruption?
If you want two external interrupts, then use interrupt generation using the PIO controller.
Study Documentation/gpio/driver.txt.

igortf wrote: Or the AIC is not able to recognize two IRQ sources?
AFAIK there is one direct IRQ input to the AIC.
The interrupt signals FIQ and IRQ0 to IRQn are normally multiplexed through the PIO controllers.

Note that the four possible IRQ sources are each in different I/O sets.
The mandatory rule is that a peripheral device can only use a single I/O set of pins (because pins from multiple I/O sets may not meet timing requirements).
So what you are trying to do would violate this I/O set rule.

Regards
igortf
Posts: 18
Joined: Tue Mar 27, 2018 8:27 pm

Re: Multiple IRQ pins

Thu Mar 07, 2019 4:47 pm

Thank you for the answer blue_z.
blue_z wrote:
Fri Mar 01, 2019 4:44 am
If you want two external interrupts, then use interrupt generation using the PIO controller.
Study Documentation/gpio/driver.txt.
I tried to use both pins as GPIO interrupt. However, a watchdog occurs with an input signal of 100kHz. Is there any flag I must pass to solve this? I am requesting my IRQ with "IRQF_TRIGGER_FALLING | IRQF_NO_THREAD" flags.

Best regards,
Igor Franco
blue_z
Location: USA
Posts: 1977
Joined: Thu Apr 19, 2007 10:15 pm

Re: Multiple IRQ pins

Fri Mar 08, 2019 1:46 am

igortf wrote: I tried to use both pins as GPIO interrupt. However, a watchdog occurs with an input signal of 100kHz.
You're not clear as to what the circumstances are.
What is this "input signal"?
What is the relationship beween two GPIO interrupts and one "input signal"?
If this is a clock and your interrupt source, why not use a (recurring) PIT (programmable interval timer)?
What happens if this "input signal" is a slower frequency?

igortf wrote: I am requesting my IRQ with "IRQF_TRIGGER_FALLING | IRQF_NO_THREAD" flags.
Why are you using IRQF_NO_THREAD?
Are you aware that the presentation Inside The RT Patch warns that IRQF_NO_THREAD should not be used "unless you know what you are doing"?

Regards
igortf
Posts: 18
Joined: Tue Mar 27, 2018 8:27 pm

Re: Multiple IRQ pins

Fri Mar 08, 2019 2:45 pm

Hello blue_z,
blue_z wrote:
Fri Mar 08, 2019 1:46 am
What is this "input signal"?
What is the relationship beween two GPIO interrupts and one "input signal"?
If this is a clock and your interrupt source, why not use a (recurring) PIT (programmable interval timer)?
What happens if this "input signal" is a slower frequency?
Sorry for my lack of details. This input signal is a PWM. I am using this kind of signal only to test my external interrupt. Because I need to expect frequencies up to 100kHz. At slower frequencies, the watchdog also occurs, but it takes much longer.
blue_z wrote:
Fri Mar 08, 2019 1:46 am
Why are you using IRQF_NO_THREAD?
Are you aware that the presentation Inside The RT Patch warns that IRQF_NO_THREAD should not be used "unless you know what you are doing"?
I was using the NO_THREAD to ensure a quick response to the interrupt. But I will try to use it as a thread. I also found the implementation of the IRQ handler of the PIO controller. It seems that the chained interrupt handler acts as an infinite loop at high frequencies.

Thanks for all the support.
Igor Franco
igortf
Posts: 18
Joined: Tue Mar 27, 2018 8:27 pm

Re: Multiple IRQ pins

Thu Mar 21, 2019 12:43 pm

Hello,

Just to close the case, I found the problem. I was disabling my GPIO interrupt to wait for 10ms (as a filter to avoid burst) and the re-enable it after that time. But I have a flag that allows the code in the interrupt handler to be executed. I was setting this flag to TRUE after reactivating the interrupt, causing a burst of interrupts and trapping the processor.

Thanks for all the support.

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