JTAG debugging problem (Segger)

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dev
Posts: 65
Joined: Thu Feb 28, 2008 5:37 am

JTAG debugging problem (Segger)

Fri Mar 28, 2008 6:25 am

Hello folks,

I have just got an AT91SAM9263EK board and I tried some sample programs on it. When I am loading the bin files directly to the board without
debugging they are working fine.

But when I am trying to compile the source using Eclipse IDE and debug it using the segger debugger it is giving following error

J-Link ARM V3.74f Error

Bad JTAG communication: Write to IR: Expected 0x1, got 0x0(TAP Command : 15) @ off 0x1979.

The GDB server log is like this

J-Link GDB Server V3.74f

JLinkARM.dll V3.74f (DLL compiled Aug 10 2007 17:57:34)


J-Link connected
Firmware: J-Link ARM V6 compiled Jun 14 2007 14:33:17
Listening on TCP/IP port 2331

J-Link found 1 JTAG device, Total IRLen = 4
JTAG ID: 0x0792603F (ARM9)

Connected to 127.0.0.1
Reading all registers
Read 4 bytes @ address 0x00000000 (Data = 0xEA000006)
Read 4 bytes @ address 0x00000000 (Data = 0xEA000006)
ERROR: Bad JTAG communication: Write to IR: Expected 0x1, got 0x0 (TAP Command : 2) @ Off 0x5.

Connection to debugger closed !

All pending breakpoints removed
Resetting target (halt with breakpoint @ address 0)

J-Link connected
Firmware: J-Link ARM V6 compiled Jun 14 2007 14:33:17
ERROR: Could not find supported CPU core on JTAG chain
ERROR: Could not connect to target.

J-Link connected
Firmware: J-Link ARM V6 compiled Jun 14 2007 14:33:17

Resetting target and trying again to connect...

J-Link found 1 JTAG device, Total IRLen = 4
JTAG ID: 0x0792603F (ARM9)


Can somebody please help

Thanks and Regards,

Devendra
snrao
Posts: 22
Joined: Mon Aug 21, 2006 8:09 am

hi

Sat Apr 26, 2008 12:15 pm

hi,
download the latest version driver from Segger V3.78

It will solve your problem

regards
SNR
srinathtummalapalli
Posts: 9
Joined: Fri Sep 26, 2008 12:07 pm

Re: JTAG debugging problem (Segger)

Sat Sep 27, 2008 6:33 am

Hi ,

Could you please send me the link for the latest software segger v3.78 ..

Eagerly waiting for your reply..

-Srinath.
srinathtummalapalli
Posts: 9
Joined: Fri Sep 26, 2008 12:07 pm

Re: JTAG debugging problem (Segger)

Sat Sep 27, 2008 7:19 am

hI,

I hope I am using the wrong software , How do I know which software suits my board ??
I there any document mentioning these ??

Thanks,
Srinath
gerhardf
Posts: 554
Joined: Thu Dec 02, 2004 2:28 pm

Re: JTAG debugging problem (Segger)

Sat Sep 27, 2008 7:36 am

srinathtummalapalli wrote: Could you please send me the link for the latest software segger v3.78 ..
http://www.segger.com/download_jlink.html

regards
gerhard
srinathtummalapalli
Posts: 9
Joined: Fri Sep 26, 2008 12:07 pm

Re: JTAG debugging problem (Segger)

Sat Sep 27, 2008 7:43 am

Hi,

I just installed the latest software but still the problem exists please mention me what to o ??

is that the problem with the Software or else withthe power supply..
I am using ATX power supply.

Could you please suggest me ... If we order for a Atmel CAP-DK board (AT91CAP9A-DK) will they give the adapter with it for power ???

If so could you please metion the power ratings of that ..
output ratings???
JonKeys
Posts: 1
Joined: Tue Feb 17, 2009 1:51 am

Re: JTAG debugging problem (Segger)

Tue Feb 17, 2009 1:53 am

Do you think that JTAGTest (http://www.jtagtest.com/) will work with AT91SAM ? I need to perform boundary scan on it, but I am unsure if it's possible via JTAG.

According to manuals from http://www.jtagtest.com/docs it should work, but I would be happy if someone could confirm this.
zgora
Posts: 2
Joined: Tue Mar 18, 2008 2:45 pm

Re: JTAG debugging problem (Segger)

Thu Apr 16, 2009 12:53 am

JonKeys wrote:Do you think that JTAGTest (http://www.jtagtest.com/) will work with AT91SAM ? I need to perform boundary scan on it, but I am unsure if it's possible via JTAG.
I used TopJTAG Probe (http://www.topjtag.com/probe/) software to do boundary-scan on AT91SAM7S64 and it works fine. Don't forget to put JTAGSEL pin high to enable boundary-scan test logic in AT91SAM.

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