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External Async SRAM on AT91SAM9G20

Posted: Tue Jan 11, 2011 11:55 am
by dipen238
I have custom board based on AT91SAM9G20 CPU , and i have connected Asynchronous SRAM(32 bit) on Chip select line NCS0 and NCS2.

I want to access this SRAM from SAMBA -2.10 utility but i dont know how to initialize this.
Or do i need to add any initialization code and recompile the applet of SAMBA then which one should be compile ?

I have connected SDRAM on NCS1 and Nand on NCS3 and CF card slot is connected with NCS4 chip selects.

Has anybody interfaced like it earlier ?

Re: External Async SRAM on AT91SAM9G20

Posted: Tue Jan 11, 2011 4:03 pm
by CptTitanic
It depends a lot of what you actually want to achieve by accessing the external SRAM in SAM-BA.

I'm using an earlier version, but there I'd add the bus initialization in with the SDRAM applet(s), I'm using a different SDRAM than the 9G20-EK on a custom board, and modified a couple of applets and scripts to reflect my hardware arrangement. That way you could load and execute the code from either Ext SDRAM or Ext SRAM based on the address you used. Running/debugging code from SAM-BA is rather laborious.

However, that's not how I'm running code in RAM these days. It's far easier to use Keil and some of the SAM-ICE project options. Configuring the initialization scripts to poke the appropriate EBI configuration registers (width, timing, mapping, etc) within the chip, before it downloads the application into the memory address(es) specified in the project. This permits me to load and debug code directly from the SRAM, SDRAM, etc by attaching a JTAG pod, and hitting a few buttons.

If you're doing Linux, you should initialize your SRAM from within the AT91BootStrap, and perhaps load uBoot into the SRAM instead of the SDRAM as it does normally. You'd have to compile for the alternate addresses.

But, it all depends on your goals are, and what tools you have to work with, and how much time you have.

Re: External Async SRAM on AT91SAM9G20

Posted: Wed Jan 12, 2011 6:30 am
by dipen238
How to debug using SAM-ICE ?

If i am initializing the Async SRAM in bootstrap then do i need to configure the SMC setup. pulse and cycle register for chip select 0 and 2 instead of SDRAM ?

Do i need to reinitialize the chip select pins and NRD and NWE pins ?


I got success to init the SDRAM and Async SRAM simultaneously in SAMBA-2.10.