Page 1 of 1

at91sam9G45--How to reduce the master clock to 50MHz

Posted: Tue Jul 07, 2015 9:12 am
by soullou
Hello,I'm Zebin Lou.
we have made a PCB based on arm-SAM9G45,and we get some problems with start-up.we can start with the bootstrap,u-boot and kernel successfully,but just can't mount the filesystem.
I have modified the file:/board/at91sam9m10g45ek.h as follow.
original

Code: Select all

#define MASTER_CLOCK		(132096000)

#define BOARD_MAINOSC		12000000

/* PCK = 396MHz, MCK = 132MHz */
#define PLLA_MULA		199
#define PLLA_DIVA		3
#define BOARD_MCK		((unsigned long)(((BOARD_MAINOSC / \
					PLLA_DIVA) * (PLLA_MULA + 1)) / 2 / 3))
#define BOARD_OSCOUNT		(AT91C_CKGR_OSCOUNT & (64 << 8))
#define BOARD_CKGR_PLLA		(AT91C_CKGR_SRCA | AT91C_CKGR_OUTA_0)
#define BOARD_PLLACOUNT		(0x3F << 8)
#define BOARD_MULA		(AT91C_CKGR_MULA & (PLLA_MULA << 16))
#define BOARD_DIVA		(AT91C_CKGR_DIVA & PLLA_DIVA)

#define PLLA_SETTINGS		(BOARD_CKGR_PLLA \
				| BOARD_PLLACOUNT \
				| BOARD_MULA \
				| BOARD_DIVA)

/* Switch MCK on PLLA output PCK = PLLA/2 = 3 * MCK */
#define BOARD_PRESCALER_MAIN_CLOCK	(AT91C_PMC_PLLADIV2_2 \
					| AT91C_PMC_MDIV_3 \
					| AT91C_PMC_CSS_MAIN_CLK)

#define BOARD_PRESCALER_PLLA		(AT91C_PMC_PLLADIV2_2 \
					| AT91C_PMC_MDIV_3 \
					| AT91C_PMC_CSS_PLLA_CLK)
modified

Code: Select all

#define MASTER_CLOCK        (50000000)

#define BOARD_MAINOSC       12000000

/* PCK = 396MHz, MCK = 132MHz */
#define PLLA_MULA       199
#define PLLA_DIVA       3
#define BOARD_MCK       ((unsigned long)(((BOARD_MAINOSC / \
                    PLLA_DIVA) * (PLLA_MULA + 1))/ 2 / 2 / 4))
#define BOARD_OSCOUNT       (AT91C_CKGR_OSCOUNT & (64 << 8))
#define BOARD_CKGR_PLLA     (AT91C_CKGR_SRCA | AT91C_CKGR_OUTA_0)
#define BOARD_PLLACOUNT     (0x3F << 8)
#define BOARD_MULA      (AT91C_CKGR_MULA & (PLLA_MULA << 16))
#define BOARD_DIVA      (AT91C_CKGR_DIVA & PLLA_DIVA)

#define PLLA_SETTINGS       (BOARD_CKGR_PLLA \
                | BOARD_PLLACOUNT \
                | BOARD_MULA \
                | BOARD_DIVA)
/* Switch MCK on PLLA output PCK = PLLA/2 = 4 * MCK */
#define BOARD_PRESCALER_MAIN_CLOCK  (AT91C_PMC_PLLADIV2_2 \
                    | AT91C_PMC_MDIV_4 \
                    | AT91C_PMC_PRES_CLK_2 \
                    | AT91C_PMC_CSS_MAIN_CLK)

#define BOARD_PRESCALER_PLLA        (AT91C_PMC_PLLADIV2_2 \
                    | AT91C_PMC_MDIV_4 \
                    | AT91C_PMC_PRES_CLK_2 \
                    | AT91C_PMC_CSS_PLLA_CLK)
after I make the bootstrap,get the binary files.But it do not work,the messages still show "CPU 300MH,master 100MHz,main 12.000MHz" when the kernel starts.
If you have any advise,please tell me ,thank you!