SAMV71 CMSIS / maths performance

Discussions around product based on ARM Cortex M7 core.
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Turboman
Posts: 4
Joined: Mon Sep 07, 2015 9:18 am

SAMV71 CMSIS / maths performance

Mon Sep 07, 2015 10:02 am

Hi, I'm using the SAMV71 xplained ultra to evaluate maths performance (amongst other things) on Atmel's Cortex M7 core.

I got a basic project going in Atmel studio to confirm operation and then timed a single precision float multiplication operation using an LED toggle in a loop. I compared this to an ST part, the STM32F746, at 200MHz. Here's what I got:

Atmel @ 300MHz, FPU enabled:
560ns

ST @ 200MHz, FPU enabled:
110ns

Both at -O1 optimisation. Atmel arm toolchain vs GCC for the ST aprt in SW4STM32 IDE (is atmel arm toolchain using GCC?)

For the Atmel part, I've configured the clock speed and enabled the FPU before I do the maths. But this seems somewhat slower on the Atmel part - 168 vs 22 instruction cycles, so I suspect that the cache is not enabled somewhere (instruction, data or both?) but I couldn't see any immediate functions to do so.

Anyway, any pointers / checks would be appreciated,

regards :)
Turboman
Posts: 4
Joined: Mon Sep 07, 2015 9:18 am

Re: SAMV71 CMSIS / maths performance

Mon Sep 07, 2015 9:20 pm

Ok, so use:

SCB_EnableICache();
SCB_EnableDCache();

and now I get 120ns for a mult_f32. This is about 36 instructions.

Does this seem reasonable? Compared to ST's estimated 22? Is Atmel using the GNU C compiler?

Is there stuff going on with ST's ART acceleration vs Atmel's 150MHz bus access for flash? I'm new to Atmel and want to see what this can do, so help is appreciated...
Turboman
Posts: 4
Joined: Mon Sep 07, 2015 9:18 am

Re: SAMV71 CMSIS / maths performance

Wed Sep 09, 2015 12:29 pm

I think most of the answers to my questions are in here: Helpful PDF

Laters...

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