Configuration Help for ATMEL ATSAML21G17B-AUT

Discussions around product based on ARM Cortex M0+ core.

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Configuration Help for ATMEL ATSAML21G17B-AUT

Tue Nov 03, 2015 1:07 pm

We are using ATMEL ATSAML21G17B-AUT in our design & the communication used is SPI. We are not able to figure out that if we choose PA12 - PA15 as SPI pins, then how to configure MOSI, MISO, SCK and SS. Kindly provide the solution regarding this issue.
Posts: 7
Joined: Thu Sep 10, 2015 11:10 am

Re: Configuration Help for ATMEL ATSAML21G17B-AUT

Tue Nov 03, 2015 5:17 pm

You write to the DIPO and DOPO fields of the REG_SERCOMn_SPI_CTRLA register. For example, if you use SERCOM2 for slave SPI, and want to have
MISO at pad 0 (PA12)
SS at pad 1 (PA13)
MOSI at pad 2 (PA14)
SCK at pad 3 (PA15)

you program 3 to the DOPO field and 2 to the DIPO field.

REG_SERCOM2_SPI_CTRLA = (0x3<<16) | (0x2<<20) | ..... all the other fields of CTRLA.
Posts: 68
Joined: Mon Jan 26, 2015 2:33 pm

Re: Configuration Help for ATMEL ATSAML21G17B-AUT

Mon Nov 23, 2015 10:24 am

Yeh, this can catch you - the DIPO and DOPO registers cannot be set arbitrarily. There are only certain configurations that work. A quick way to work it out is to look at the table on page 59 of the SAM Serial Peripheral Interface Driver (SERCOM SPI) ASF manual - AT03255: "MUX Settings" sub-section "Master Mode Settings" or "Slave Mode Settings".

Also, be very careful of selecting Mux I through P, as the application note warns rather bleakly. These options do not work in all the silicon versions. Thus far Atmel have not been able to tell me which versions, and how you recognise them based on the markings on the component reel. What happens is that you will select Mux 'N' for example, and then go check the DOPO register. It will not change as required. So to be safe use MUX A through H.

Go well.

PS. It's always good to try a bit of debugging, and then add the results to your post, rather than just asking for the "solution".

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