Running the ATSAMD20/21 at 48MHz without ASF

Discussions around product based on ARM Cortex M0+ core.

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halherta
Posts: 6
Joined: Fri Jun 20, 2014 11:55 pm

Running the ATSAMD20/21 at 48MHz without ASF

Sat Jun 21, 2014 12:16 am

Hello there,
I've been studying the ATSAMD20 micro's datasheet for two days now. I just ordered a few 32-LQFP parts that I will be soldering onto DIP adapters to play around with with my JLINK-EDU.

I believe I have a general idea on how to configure the clocks, but I would like to see some code examples....preferably non-ASF based. I prefer register-based manipulation than having to use a framework. If some has such code examples It would be much appreciated...

Specifically I'd like to be able to have the CPU/Buses run at 8MHz from the internal OSC8M and at 48MHz from the DFLL48M (closed-loop with OSC8M as source)

Based on what I've read, out of reset, the microcontroller uses the OSC8M (internal 8MHz clock) divided by 8 so the effective clock speed on the CPU/AHB & APB should be about 1MHz.

To run the Micro (CPU and Buses) at 8MHz should be easy..basically I think that the prescaler in the OSC8M clock source needs to be changed from 8 to 1.

To run the Micro at (CPU & Buses) at 48MHz, one could connect the OSC8M to say clock generator 1, the output from clock generator 1 is then routed to the the DFLL48M oscillator. The DFLL48M reference clock is configured to output 48MHz from the OSC8MD's 8MHz clock and then the source for generic clock generator 0 (GCLKMAIN) is changed from OSC8M to the DFLL48M.......

thie is easier said than done and might be wrong...I'd appreciate it if someone can give me some feedback on this...register-based code that is verified to work would also be awesome!
halherta
Posts: 6
Joined: Fri Jun 20, 2014 11:55 pm

Re: Running the ATSAMD20/21 at 48MHz without ASF

Sat Jun 21, 2014 2:36 am

OK, I found register-based example for DFLL48M in this threaddiscussions/viewtopic.php/f,31/t,22135.html.

In that example the DFLL48M uses the OSC32K oscillator as a source....

Can one follow the same procedure described/coded in that thread but use the OSC8M as source to the DFLL48M instead of the OSC32K?
pozz
Posts: 67
Joined: Fri Jun 13, 2014 2:55 pm

Re: Running the ATSAMD20/21 at 48MHz without ASF

Sat Jun 21, 2014 8:40 am

Finally I encounter another user of this microcontroller :-)

Unfortunately I'm at the very beginning with D20 so I can't help you too much.
To run the Micro at (CPU & Buses) at 48MHz, one could connect the OSC8M to say clock generator 1, the output from clock generator 1 is then routed to the the DFLL48M oscillator. The DFLL48M reference clock is configured to output 48MHz from the OSC8MD's 8MHz clock and then the source for generic clock generator 0 (GCLKMAIN) is changed from OSC8M to the DFLL48M.......
How to route the output from clock generator 1 to the DFLL48M? From the datasheet I see only the output from generic clock multiplexer 0 could be the reference of DFLL48M.
You could use clock generator 1, but you have to configure generic clock multiplexer 0 too.

Regarding the clocks, I think I haven't understand the concept of "clock domains" and "asyncronous clocks". If I use just one clock source (internal 8MHz oscillator or an external crystal), should I care about synchronization registers (sync bit) and read/write accesses?
halherta
Posts: 6
Joined: Fri Jun 20, 2014 11:55 pm

Re: Running the ATSAMD20/21 at 48MHz without ASF

Sat Jun 21, 2014 10:28 pm

This is how I envision the process (Have a look at the attached image):
  • 1. In the SYSCTRL Peripheral enable the OSC8M (or OSC32K) peripheral. In the Generic Clock Controller connect the OSC8M(or OSC32K) as an input/source to Generic Clock Generator 1.

    2. In the Generic Clock Controller connect the the output of the Generic Clock Generator 1 to the DFLL48M Reference (Generic clock Mux 0).

    3.This ensures that the DFLL48M gets OSC8M (or OSC32K) as input. Configure the multiplier of the DFLL48M to output 48MHz

    4. Wait until DFLL48M ouput is locked and ready. Increase Flash wait states (to 1 or 2 i think) in the NVM peripheral inorder for Flash(Program memory) to cope with the 48MHz. Now switch the source of the Generic Clock Generator 0 from OSC8M toDFLL48M
This is basically my understanding of how to go about producing a 48MHz clock in a closed loop setup from a OSC32K or OSC8M internal oscillator. But I've yet to try it...still waiting for the SAMD20 IC's to arrive!

The code example at discussions/viewtopic.php/f,31/t,22135.html
is well documented and has really helped me grasp this. Thanks LaserBob!
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pozz
Posts: 67
Joined: Fri Jun 13, 2014 2:55 pm

Re: Running the ATSAMD20/21 at 48MHz without ASF

Sun Jun 22, 2014 12:54 am

Now I understand your point. I think it works as you described.

Please, if you want, post your code here.
M14
Posts: 20
Joined: Thu Mar 27, 2014 10:51 am

Re: Running the ATSAMD20/21 at 48MHz without ASF

Tue Jun 24, 2014 11:50 am

Don't use the 8MHz clock, use a external 32KHz crystal as reference. 8Mhz is a R/C osc, not stable enough.

Check this thread for more info :).
discussions/viewtopic.php/f,31/t,22135.html

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