Something I need to get off of my chest because this held me up for more than a day: I'm currently working on getting a project working using the SAMD20E14. I based my set up of the watchdog timer on the code from qs_wdt_basic.c in the xdk-asf-3.14.0\sam0\drivers\wdt\quick_start folder. However a watchdog timer that can be disabled by a runaway program (e.g. one that fills all the RAM with 0s) doesn't make any sense at all so any useful watchdog timer should never be disabled once it is running. Because of this I set config_wdt.always_on to true. (Has anyone at Atmel tried this?). This resulted in the device hanging whenever the watchdog timer reset the IC. There were multiple reasons for this:
1. The config_wdt.always_on option sets WDT_CTRL_ALWAYSON in WDT.CTRL. If the program is reset by a watchdog reset, then the program will inevitably run through its initialization sequence and try to set up the WDT. Since the register is still write protected, an exception is raised (see overview on the Peripheral Access Controller) and the program crashes.
2. The config_wdt.always_on option also sets the GCLK_CLKCTRL_WRTLOCK option in GCLK.CLKCTRL. For the same reasons as in (1), an exception will be raised and the program crashes.
3. The default GCLK for the WDT is GCLK_GENERATOR_4. However because of errata 10645 and the fact that it is locked (see (2)), the GCLK system locks up when the initialization code tries to set up GCLK_GENERATOR_4.
Workaround for (1) and (2) is to check the reset type. The write lock bits are only cleared by a power on reset so the initialization code can only be executed in that case.
Workaround for (3) is to use GCLK_GENERATOR_1, as suggested by the errata.
There is no mention of the problems associated with this in the qs_wdt_basic.c file or anywhere in the documentation that I could find so please add this to save others the trouble that I had.
Discussions around product based on ARM Cortex M0+ core.
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