[SOLVED] Inexplicable pauses when using EBI + DMA (SAMA5D35)

Discussion around products based on ARM Cortex-A5 core.

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arhiv6
Posts: 3
Joined: Tue Jun 05, 2018 10:14 am

[SOLVED] Inexplicable pauses when using EBI + DMA (SAMA5D35)

Wed Jun 13, 2018 1:02 pm

Hello,

I use EBI interface for connecting to FPGA. All works fine (read, write, including using DMA). But I found that DMA transmits data in batches of 16 write cycles. For example, I run DMA-transfering 1024 bytes to FPGA and see (part of the transmission is visible):

Image
It's normal behavior for DMA? Why do these pauses appear? Code for configuring and starting DMA transaction taken in this driver (see atmel_nand_dma_op function) as a basis. Processor: SAMA5D35.

Best Regards, arhiv6.
Last edited by arhiv6 on Mon Jun 18, 2018 7:28 am, edited 1 time in total.
blue_z
Location: USA
Posts: 1676
Joined: Thu Apr 19, 2007 10:15 pm

Re: Inexplicable pauses when using EBI + DMA (SAMA5D35)

Thu Jun 14, 2018 9:15 pm

arhiv6 wrote:It's normal behavior for DMA? Why do these pauses appear?
Looks like ordinary burst-mode DMA to me. What were you expecting?
Allowing the DMAC to hog the memory bus (e.g. a "block" transfer) would be detrimental to CPU performance (e.g. interrupt latency).

Regards
arhiv6
Posts: 3
Joined: Tue Jun 05, 2018 10:14 am

Re: Inexplicable pauses when using EBI + DMA (SAMA5D35)

Mon Jun 18, 2018 7:26 am

blue_z wrote:
Thu Jun 14, 2018 9:15 pm
Looks like ordinary burst-mode DMA to me. What were you expecting?
This is not specified in the documentation, and I was surprised at these pauses.

blue_z wrote:
Thu Jun 14, 2018 9:15 pm
Allowing the DMAC to hog the memory bus (e.g. a "block" transfer) would be detrimental to CPU performance (e.g. interrupt latency).
It sounds reasonable. Thanks for the answer!

Best Regards, arhiv6.

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