I am looking for some guidance on the layout of the SAMA5D31 external oscillator. I have selected a 48MHz Crystal and I have a few questions.
- Should there be a ground plane beneath it and around it?
- Is a grounding ring a good idea tied to GND_PLL?
- I have estimated the parasitics as per below
- Cload = 2*(Cpara) + Cpackage + Cboard + Crouting
Cpara - From CPU datasheet, I think this is internal to the chip, it is specified in the table as between 0.6-0.8pF, with 0.7pF typical. Let's take it as Cpara = 0.7pF.
Cpackage - Due to package and bonding.. I think this also has to do with the CPU and its mounting to the board? Typical value of Cpackage = 0.75pF
Crouting - Internal routing in the chip itself, typical value Crouting = 1.5pF
Cboard - I think this is where our trace lengths come into play. As it stands our total trace length is now 16.137mm. I will explain this calculation out in further detail below.
Cload = 4.347pF (Crystal is expecting 6pF, and CPU datasheet wants between 4-6pF).
Trace Width - 0.00013m
Height Above Return Path - Estimated at 0.0015748m
Thickness - 0.00007112m (2oz Copper)
Relative Permittivity (FR-4) = 4.4
Trace Length - 0.016137m
Calculator: https://technick.net/tools/impedance-ca ... icrostrip/
Result - 43.21pF/m
Cboard = 0.697pF