Problem with SAMA5D41 initialization

[bvv]

Hi. All

We are trying to develop our board based on SAMA5D41, but encountered some difficulties with configuring PIO on ports A-E - they are working only as inputs, but not as outputs. We are trying to configure registers through SAMBA applet, after its execution we see that registers are in appropriate state but nothing works as expected.
Applets for SPI or NAND are not working either, while applet for DDR2 initialization is OK.

What could be the reason for such behavior?

[blue_z]

they are working only as inputs, but not as outputs.
...
but nothing works as expected.
...
Applets for SPI or NAND are not working either,

"Not working" is a summary or conclusion that doesn't contain any diagnostic information.

What could be the reason for such behavior?

Peripheral registers that do not respond properly are usually an indication of a disabled peripheral.
Although your claim of being able to read PIO pins is suspect in such a condition, unless you're not aware that you're reading garbage.

Regards

[bvv]

Applets for SPI or NAND - applets SAM-BA 2.15.
When I run these applications, there is not any signal on any of the processor pins.

Here`s my setup for port PORTA:

Code: Select all

	.....
	pin->pio->PIO_WPMR = 0x50494F00;
	pin->pio->PIO_PER = 0xf000f0ff;
	pin->pio->PIO_PDR = 0x0fff0f00;
	pin->pio->PIO_OER = 0xf000f001;
	pin->pio->PIO_ODR = 0x0fff0ffe;
	pin->pio->PIO_IFDR = 0xffffffff;
	pin->pio->PIO_SODR = 0x30000000;
	pin->pio->PIO_CODR = 0xc000f001;
	pin->pio->PIO_IDR = 0xffffffff;
	pin->pio->PIO_PPDER = 0x000000ff;
	pin->pio->PIO_PUDR = 0x0fffffff;
	pin->pio->PIO_MDER =  0xffffffff;
	pin->pio->PIO_DRIVER1 =  0xffffffff;
	pin->pio->PIO_DRIVER2 =  0xffffffff;
	pin->pio->PIO_OWDR =  0;

	return (uint32_t)(pin->pio->PIO_PDSR)&0x7fffffff; // trying to read its current state

I receive wrong value on return.

When I try to install the PIO Pins to a certain state, nothing changes. All pins are input. Pull-up and Pull-down are not connected.

[blue_z]

When I run these applications, there is not any signal on any of the processor pins.
...
I receive wrong value on return.
...
When I try to install the PIO Pins to a certain state, nothing changes..

All you have done is add a few words to expand "not working" to "X is not doing Y".
Negative descriptions provide only a minimal amount of information by exclusion.
Since there's an infinite list of negative descriptions, you have a long way to go to narrow down what happens.

Have you even checked board voltages and clock signals, and performed comprehensive memory tests?

Regards

[bvv]

Have you even checked board voltages and clock signals, and performed comprehensive memory tests?

Board voltages (Vddbu = 2.01, Vddcore = 1,8, Vddioddr = 1.8, Vddiom = 3.3. Vddiop = 3.3, Vddutmic = Vcccore = 1,2 Vddutmii=3.3, Vddplla = Vcccore = 1.2. Vddosc=3.3, Vddfuse=0) and clock signals(12 MHz) and (32768 Hz) are OK.
Board voltages sequence : Vddbu -> Vddana -> Vddiom, Vddiop,Vddutmii, Vddosc -> Vddcore, Vddioddr. And Reset after 150ms.
Memory test passed with DDR initialization.

Code: Select all

static unsigned char ExtRAM_TestOk(void)
{
    uint32_t i;
    uint32_t *ptr = (uint32_t *) DDR_CS_ADDR;

    for (i = 0; i < 10 * 1024; ++i) {
        if (i & 1) {
            ptr[i] = 0x55AA55AA | (1 << i);
        }
        else {
            ptr[i] = 0xAA55AA55 | (1 << i);
        }
    }
    for (i = 0; i < 10 * 1024; ++i) {
        if (i & 1) {
            if (ptr[i] != (0x55AA55AA | (1 << i))) {
                return 0;
            }
        }
        else {
            if (ptr[i] != (0xAA55AA55 | (1 << i))) {
                return 0;
            }
        }
    }
    return 1;
}

[blue_z]

That's a sad excuse for a memory "test".
That routine performs only one pass of the memory range.
That routine writes and reads only 10K long words (40KB). Surely there's more DRAM than that.
Only half of the first 32 long words get a unique data pattern. Otherwise just two data patterns are alternately used.

There is no test to verify every location is unique and addressable (e.g. use address as pattern).
There is no test of every bit for retaining a one value (e.g. all 1s pattern).
There is no test of every bit for retaining a zero value (e.g. all 0s pattern).

IMO you haven't validated the functionality of the external memory on your board with that routine.
Try the alt memtest from U-Boot, or adapt Memtest86+.

Regards

[bvv]

Hi!

Try the alt memtest from U-Boot, or adapt Memtest86+.

I used U-boot memtest source code. Size for test memory is 64 Mb.
Here`s modified code.

Code: Select all

static uint32_t mem_test(void)
{
	uint32_t *buf = (uint32_t *) DDR_CS_ADDR;
	uint32_t start_addr = (uint32_t) DDR_CS_ADDR;
	uint32_t end_addr = (uint32_t) DDR_CS_ADDR + 0x04000000 - 4; //64Mb
	uint32_t *dummy = 0;
	uint32_t *addr;
	uint32_t errs = 0;
	uint32_t val, readback;
	int j;
	uint32_t offset;
	uint32_t test_offset;
	uint32_t pattern;
	uint32_t temp;
	uint32_t anti_pattern;
	uint32_t num_words;
	static const uint32_t bitpattern[] = {
		0x00000001,	/* single bit */
		0x00000003,	/* two adjacent bits */
		0x00000007,	/* three adjacent bits */
		0x0000000F,	/* four adjacent bits */
		0x00000005,	/* two non-adjacent bits */
		0x00000015,	/* three non-adjacent bits */
		0x00000055,	/* four non-adjacent bits */
		0xaaaaaaaa,	/* alternating 1/0 */
	};

	num_words = (end_addr - start_addr) / sizeof(uint32_t);

	addr = buf;
	for (j = 0; j < sizeof(bitpattern) / sizeof(bitpattern[0]); j++) {
		val = bitpattern[j];
		for (; val != 0; val <<= 1) {
			*addr = val;
			*dummy  = ~val; /* clear the test data off the bus */
			readback = *addr;
			if (readback != val) {
				errs++;
					return 1;
			}
			*addr  = ~val;
			*dummy  = val;
			readback = *addr;
			if (readback != ~val) {
				errs++;
					return 2;
			}
		}
	}

	pattern = (uint32_t) 0xaaaaaaaa;
	anti_pattern = (uint32_t) 0x55555555;

	for (offset = 1; offset < num_words; offset <<= 1)
		addr[offset] = pattern;

	test_offset = 0;
	addr[test_offset] = anti_pattern;

	for (offset = 1; offset < num_words; offset <<= 1) {
		temp = addr[offset];
		if (temp != pattern) {
			errs++;
				return 3;
		}
	}
	addr[test_offset] = pattern;
	for (test_offset = 1; test_offset < num_words; test_offset <<= 1) {
		addr[test_offset] = anti_pattern;

		for (offset = 1; offset < num_words; offset <<= 1) {
			temp = addr[offset];
			if ((temp != pattern) && (offset != test_offset)) {
				errs++;
					return 4;
			}
		}
		addr[test_offset] = pattern;
	}
	num_words++;

	for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
		addr[offset] = pattern;
	}

	for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
		temp = addr[offset];
		if (temp != pattern) {
			errs++;
				return 5;
		}

		anti_pattern = ~pattern;
		addr[offset] = anti_pattern;
	}
	for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
		anti_pattern = ~pattern;
		temp = addr[offset];
		if (temp != anti_pattern) {
			errs++;
				return 6;
		}
		addr[offset] = 0;
	}

	return 0x7fffffff;
}

This test was passed successfully.

Regards