SAM3X8E TC2 TIOA7 not working from XC1

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Timmmm
Posts: 2
Joined: Tue Jan 19, 2016 9:56 am

SAM3X8E TC2 TIOA7 not working from XC1

Tue Jan 19, 2016 1:01 pm

Hi, I am using the TC2 Timer/Counter module to try to output a couple of signals. I set TC2 channel 0 to be a regular clock using TIMER_CLOCK1 as input. It outputs a signal on TIOA6.

Then I set channels 1 and 2 to take TIOA6 as input using XC1 and XC2 respectively (the block mode is configured to connect TIOA6 to XC1 and XC2). They output a signal on TIOA7 and TIOA8.

Unfortunately, while the TIOA6 and TIOA8 outputs work, TIOA7 doesn't. If I change channel 1 to use TIMER_CLOCK1 as an input instead of XC1 it does output a signal, so I know I am using the right pin and everything. Does anyone have any ideas? Here is my code.

Code: Select all

	// Enable outputs.
	DigitalOut tioa6(PC25); // I ported the SAM3X8E to mBed by the way.
	pin_function(PC25, IOPORT_MODE_MUX_B);
	ioport_disable_pin(PC25);

	DigitalOut tioa7(PC28);
	pin_function(PC28, IOPORT_MODE_MUX_B);
	ioport_disable_pin(PC28);

	DigitalOut tioa8(PD7);
	pin_function(PD7, IOPORT_MODE_MUX_B);
	ioport_disable_pin(PD7);

	pmc_enable_periph_clk(ID_TC6); // This is actually TC2, channel 0.
	pmc_enable_periph_clk(ID_TC7); // This is actually TC2, channel 1.
	pmc_enable_periph_clk(ID_TC8); // This is actually TC2, channel 2.

	// Init the channel 0 clock to output a regular clock signal (1.5 MHz)
	tc_init(TC2, 0, TC_CMR_TCCLKS_TIMER_CLOCK1 | // MCLK/2 (42 MHz)
					TC_CMR_WAVE | // Waveform mode.
					TC_CMR_WAVSEL_UP_RC | // Up counting with automatic reset on RC compare.
					TC_CMR_ACPA_SET | // RA compare effect on TIOA - set
					TC_CMR_ACPC_CLEAR); // RC compare effect on TIOA - clear
	tc_write_ra(TC2, 0, 14);
	tc_write_rc(TC2, 0, 28);

	// Init the channel 1 clock using the output of channel 0 as its input.
	tc_init(TC2, 1, TC_CMR_TCCLKS_XC1 | // Take the clock from channel 0.
					TC_CMR_WAVE | // Waveform mode.
					TC_CMR_WAVSEL_UP_RC | // Up counting with automatic reset on RC compare.
					TC_CMR_ACPA_SET | // RA compare effect on TIOA - set
					TC_CMR_ACPC_CLEAR | // RC compare effect on TIOA - clear
					TC_CMR_CLKI); // Invert clock source - trigger on falling edge rather than rising
	// 1/64 clock rate.
	tc_write_ra(TC2, 1, 32);
	tc_write_rc(TC2, 1, 64);

	// Init the channel 2 clock using the output of channel 0 as its input.
	tc_init(TC2, 2, TC_CMR_TCCLKS_XC2 | // Take the clock from channel 0.
					TC_CMR_WAVE | // Waveform mode.
					TC_CMR_WAVSEL_UP_RC | // Up counting with automatic reset on RC compare.
					TC_CMR_ACPA_SET | // RA compare effect on TIOA - set
					TC_CMR_ACPC_CLEAR | // RC compare effect on TIOA - clear
					TC_CMR_CLKI); // Invert clock source - trigger on falling edge rather than rising
	tc_write_ra(TC2, 2, 17);
	tc_write_rc(TC2, 2, 32);

	// Connect the output of TIA0 to the other two channels.
	// Note, TC_BMR_TC2XC2S_TIOA0 is incorrectly defined in the header. I'm using the correct definition here.
	tc_set_block_mode(TC2, (TC_BMR_TC1XC1S_TIOA0 << TC_BMR_TC1XC1S_Pos) | (TC_BMR_TC2XC2S_TIOA0_CORRECT << TC_BMR_TC2XC2S_Pos));

	// Start the clocks.
	tc_start(TC2, 0);
	tc_start(TC2, 1);
	tc_start(TC2, 2);
Here are some things I have eliminated:

1. Wrong pin / pin configuration: If I change TC_CMR_TCCLKS_XC1 to TC_CMR_TCCLKS_TIMER_CLOCK1 then it does output a signal on the appropriate pin.

2. Wrong channel settings: Channel 2 works with identical settings.

3. Only one channel can be connected to TIOA6? (The documentation doesn't say this but I suspected it): Nope because I disabled channel 2 and it still doesn't work.

4. The block mode definition is wrong: After realising that TC_BMR_TC2XC2S_TIOA0 was incorrect, I tripled checked the other one. It seems right.

Does anyone have any idea at all?
Timmmm
Posts: 2
Joined: Tue Jan 19, 2016 9:56 am

Re: SAM3X8E TC2 TIOA7 not working from XC1

Wed Jan 20, 2016 3:40 pm

Problem solved! The BMR constants are already shifted - I didn't need to << them again.

Btw why is this site so censored tiny?

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