simultaneously interrupt DMA interrupts and spi interrupt

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leo.ni
Posts: 52
Joined: Mon Jun 06, 2016 4:20 am

simultaneously interrupt DMA interrupts and spi interrupt

Wed Sep 27, 2017 10:02 am

Hello,all。i am run ucosii on custom board based on sama5d3. i configure spi0 with dma and communicate with other board.when communicate with small data size(example 10Byte),communication is normal.but the size is bigger(1024 byte),communicate fail.
my propblem is:Is it possible to simultaneously interrupt DMA interrupts and SPI interrupt?Or i can only choose one of them?
blue_z
Location: USA
Posts: 1496
Joined: Thu Apr 19, 2007 10:15 pm

Re: simultaneously interrupt DMA interrupts and spi interrup

Thu Sep 28, 2017 8:27 pm

leo.ni wrote:Is it possible to simultaneously interrupt DMA interrupts and SPI interrupt?
I don't understand what you're trying to do.

Regards
leo.ni
Posts: 52
Joined: Mon Jun 06, 2016 4:20 am

Re: simultaneously interrupt DMA interrupts and spi interrup

Fri Sep 29, 2017 3:30 am

I configure spi0 port with DMA(TxChannel=1 and RxChannel=2),i want enable spi0's interrupt and DMA channel2's interrupt simultaneously。Can i do this? Thanks a lot!
blue_z
Location: USA
Posts: 1496
Joined: Thu Apr 19, 2007 10:15 pm

Re: simultaneously interrupt DMA interrupts and spi interrup

Fri Sep 29, 2017 10:44 pm

leo.ni wrote:...i want enable spi0's interrupt and DMA channel2's interrupt simultaneously。
Since you're using jargon in an ambiguous manner, I still don't know what you're asking.

An interrupt, in essence, is a notification of an event that the CPU must handle.
Peripherals such as the DMA and SPI controllers can generate interrupts for several types of events.
Each type of event can be enabled or disabled to generate an interrupt. Refer to the peripheral's IER and IDR control registers for the types of events.

The answer to your literal question is "no".
To enable a set of interrupt events for SPI, the SPI_IER has to be written.
To enable a set of interrupt events for DMA, the DMAC_EBCIER has to be written.
The CPU cannot "simultaneously" write to two registers.
The CPU can write to only one register at a time.

But there's no conflict in having concurrently enabled interrupts for any number of peripherals.
The AIC interrupt controller will sort out (i.e. prioritize) the interrupts if/when the events are simultaneous.

https://english.stackexchange.com/quest ... ncurrently

Regards

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