HELP!! DMA Controller RAM to USART SAM3U4E

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nish0012
Posts: 1
Joined: Fri Sep 11, 2015 5:13 pm

HELP!! DMA Controller RAM to USART SAM3U4E

Fri Sep 11, 2015 5:22 pm

Hi everybody,

I am new to the SAM family of processors and I am trying to get the DMA controller peripheral working by moving data from a buffer array in RAM, to the USART1 port.
I have previously managed to get the DMA working by transferring one buffer array in ram to another, but I am not struggling to get achieve the same, with the USART1.

PLEASE HELP ME.

Thanking you in advance.

Here is my main.c file.

/**
* \file
*
* \brief Empty user application template
*
*/

/**
* \mainpage User Application template doxygen documentation
*
* \par Empty user application template
*
* Bare minimum empty user application template
*
* \par Content
*
* -# Include the ASF header files (through asf.h)
* -# "Insert system clock initialization code here" comment
* -# Minimal main function that starts with a call to board_init()
* -# "Insert application code here" comment
*
*/

/*
* Include header files for all drivers that have been imported from
* Atmel Software Framework (ASF).
*/
/*
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
*/
#include <asf.h>
#include "Bluetooth.h"
#include "usart.h"

#define DMA_CH 0

//! USART1
#define PIN_USART1_RXD {0x1 << 21, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_USART1_RXD_IDX (PIO_PA21_IDX)
#define PIN_USART1_RXD_FLAGS (PIO_PERIPH_A | PIO_DEFAULT)
#define PIN_USART1_TXD {0x1 << 20, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
#define PIN_USART1_TXD_IDX (PIO_PA20_IDX)
#define PIN_USART1_TXD_FLAGS (PIO_PERIPH_A | PIO_DEFAULT)

uint8_t buffer[10] = {0,1,2,3,4,5,6,7,8,9};
uint8_t buffer1[10] = {'0'};

static void configure_dmac_mem2per(void);
static void transfer_mem2per(void *p_buf, uint32_t ul_size);

int main (void)
{
irq_initialize_vectors();
cpu_irq_enable();

// Initialize the sleep manager
sleepmgr_init();

sysclk_init();
board_init();


// Start USB stack to authorize VBus monitoring
udc_start();

BT_init();


configure_dmac_mem2per();
transfer_mem2per(buffer, 10);


//Finally, poll for the DMA transfer to complete:
while (!dmac_channel_is_transfer_done(DMAC, DMA_CH)) {
}


while (1)
{

}


}


static void configure_dmac_mem2per(void)
{
uint32_t ul_cfg;

/* Initialize and enable DMA controller. */
pmc_enable_periph_clk(ID_DMAC);
dmac_init(DMAC);
dmac_set_priority_mode(DMAC, DMAC_PRIORITY_ROUND_ROBIN);
dmac_enable(DMAC);


/* Configure DMA TX channel. */
ul_cfg = 0;
ul_cfg |=
//DMAC_CFG_DST_PER(ID_USART1) |
DMAC_CFG_DST_H2SEL_SW |
DMAC_CFG_SRC_H2SEL_SW |
DMAC_CFG_SOD |
DMAC_CFG_FIFOCFG_ALAP_CFG;
dmac_channel_set_configuration(DMAC, DMA_CH, ul_cfg);
}


static void transfer_mem2per(void *p_buf, uint32_t ul_size)
{
dma_transfer_descriptor_t dmac_trans;

dmac_channel_disable(DMAC, DMA_CH);
dmac_trans.ul_source_addr = (uint32_t) buffer; //p_buf;
dmac_trans.ul_destination_addr = (uint32_t) & USART1->US_THR;
dmac_trans.ul_ctrlA = ul_size | DMAC_CTRLA_SRC_WIDTH_BYTE |
DMAC_CTRLA_DST_WIDTH_BYTE;
dmac_trans.ul_ctrlB = DMAC_CTRLB_SRC_DSCR | DMAC_CTRLB_DST_DSCR |
DMAC_CTRLB_FC_MEM2PER_DMA_FC |
DMAC_CTRLB_SRC_INCR_INCREMENTING |
DMAC_CTRLB_DST_INCR_FIXED;
dmac_trans.ul_descriptor_addr = 0;
dmac_channel_single_buf_transfer_init(DMAC, DMA_CH,
(dma_transfer_descriptor_t *) & dmac_trans);
dmac_channel_enable(DMAC, DMA_CH);


dmac_soft_single_transfer_request(DMAC, DMA_CH, buffer, & USART1->US_THR);

}

void BT_init(void)
{

gpio_configure_pin(PIN_USART1_RXD_IDX, PIN_USART1_RXD_FLAGS);
gpio_configure_pin(PIN_USART1_TXD_IDX, PIN_USART1_TXD_FLAGS);

//Setup and initiate USART0 options
static usart_serial_options_t usart_options_0 = {
.baudrate = BT_UART_BAUDRATE,
.charlength = BT_UART_CHAR_LENGTH,
.paritytype = BT_UART_PARITY,
.stopbits = BT_UART_STOP_BITS
};


usart_serial_init(BT_UART_MASTER, &usart_options_0);
}

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