EBI access delays.

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mablett
Posts: 7
Joined: Sun Jan 12, 2014 3:52 pm

EBI access delays.

Wed Nov 26, 2014 4:18 am

Using the SAMA5D36, I'm trying to squeeze as much performance out of an EBI-mapped device on NCS0 via a (Kernel mode) driver. It is a fixed address 1-byte access.
HSMC is confirmed properly programmed, read/write cycle time is about 32 ns, with no wait states of any kind. It works OK with the normal ioremap() technique, but I'm measuring a per-byte time of 115ns. I'm assuming the majority of this overhead (80+ns) is Linux/MMU overhead since the underlying assembly code is a series of in-line byte moves (all loops optimized out).

Is there a way to bypass the Linux and ARM virtual memory layer, or lock a page to reduce the overhead? Or am I chasing the wrong thing?
blue_z
Location: USA
Posts: 1547
Joined: Thu Apr 19, 2007 10:15 pm

Re: EBI access delays.

Wed Nov 26, 2014 9:35 pm

mablett wrote:HSMC is confirmed properly programmed, read/write cycle time is about 32 ns,...
Is this a calculated value or actually measured?
mablett wrote:I'm measuring a per-byte time of 115ns.
Have you tried measuring similar code without virtual memory enabled, e.g. in U-Boot? (A U-Boot "standalone" program is handy for performing such tests.) That would be the rock bottom time for comparison with the Linux time.

Regards
mablett
Posts: 7
Joined: Sun Jan 12, 2014 3:52 pm

Re: EBI access delays.

Wed Nov 26, 2014 11:56 pm

Calculated time for NCS0 time was 30.24ns, measured with a scope about 32ns to confirm programming. To be accurate, there is one more clock cycle for a hold time, making the full per-byte calculated time 37.8ns.

And dumped the HSMC registers to verify they are set right. The 114ns was measured on a scope and confirmed with software elapsed time utility over a series of 2kB transfers.

Good idea about performing the same in u-boot or similar. Will try that, and also looking at using the DMA controller in burst mode.

Thanks.
mablett
Posts: 7
Joined: Sun Jan 12, 2014 3:52 pm

Re: EBI access delays.

Sun Jun 07, 2015 4:23 pm

A much-belated update. Atmel tech support indicates that EBI transfers include delays when operating as I described (individual reads/writes). In order to remove those delays, the bus must be configured for burst-mode transfers.
jonavarque
Posts: 29
Joined: Fri Jul 10, 2015 6:35 pm

Re: EBI access delays.

Mon Jul 13, 2015 3:58 am

Thank you for that update. I will go back and look into burst mode for the EBI. I have recently come up against what appears to be the same problem with NAND flash (EBI) on a SAMS4. After getting the demo ported to the SAM4S I have successful writes and reads but the total time to read a page is about 600uS! I am using the 29F 2Gb device on the SAM4S Xplained Pro board.

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